1. Field of the Invention
The present invention relates to a resin-encapsulated semiconductor device using a lead frame. Particularly, it relates to a resin-encapsulated semiconductor device having a structure suitable for reducing thickness and suitable for the speed enhancement of elements in the structure called SIP (System In Package), and relates to the method for producing the same.
2. Related Background Art
Conventionally, a resin-encapsulated semiconductor device called “QFN (Quad Flat Non-leaded Package)” in which only one side thereof is encapsulated with an encapsulating resin has been developed as a compact and thin resin-encapsulated semiconductor device. The following will describe the conventional QFN-type resin-encapsulated semiconductor device.
First of all, the following describes a lead frame used in a resin-encapsulated semiconductor device. FIG. 9 is a plan view illustrating a conventional lead frame. The lead frame has a structure in which a die pad 3 arranged substantially at center in an opening region 2 of a frame 1 is supported by hanging leads 4. One end of each of the hanging leads 4 is connected with each of the corners of the die pad 3, while the other end thereof is connected with the frame 1. Further, the frame 1 is provided with a plurality of inner leads 5, which are arranged so that ends thereof are directed toward corresponding edges of the die pad 3.
Next, the following describes a conventional resin-encapsulated semiconductor device employing the foregoing lead frame. FIGS. 10A and 10B show a conventional resin-encapsulated semiconductor device. FIG. 10A is a bottom view of a resin-encapsulated semiconductor device, and FIG. 10B is a cross-sectional view of the device taken along a line A–A1 in FIG. 10A. A semiconductor chip 6 is bonded on the die pad 3, and the frame 1 of the lead frame (see FIG. 9) is cut away so that the inner leads 5 are separated from one another. Electrodes 7 of the semiconductor chip 6 are connected electrically with surfaces of the inner leads 5 via thin metal wires 8, respectively. Surroundings of the semiconductor chip 6 are encapsulated with an encapsulating resin 9, with a bottom face of the die pad 3 and bottom faces of the inner leads 5 being exposed. The bottom faces and side faces of the inner leads 5 are exposed on a bottom face and side faces of the resin-encapsulated semiconductor device, respectively, thereby forming external terminals 10.
Next, the following describes a method for producing the resin-encapsulated semiconductor device shown in FIGS. 10A and 10B. FIGS. 11A to 11E illustrate steps of the producing method by showing, like FIG. 10B, the cross-sections taken along the line A–A1 of FIG. 10A.
First, a lead frame as shown in FIG. 11A is prepared. The lead frame is the same as that shown in FIG. 9, though the illustration of the frame 1 (see FIG. 9) is omitted therein. A die pad 3 on which a semiconductor chip is to be mounted, and a plurality of inner leads 5 arranged so that ends thereof are directed toward edges of the die pad 3, are illustrated in the drawing. Next, as shown in FIG. 11B, a semiconductor chip 6 is mounted on the die pad 3 of the lead frame by bonding. Then, as shown in FIG. 11C, the semiconductor chip 6 is connected electrically with surfaces of the inner leads 5 via thin metal wires 8.
Subsequently, as shown in FIG. 11D, a structure in a state in which a sheet material 11 is stuck on the bottom face of the lead frame including the inner lead 5 is placed in a molding die 12. Then, an encapsulating resin is injected into the molding die and heated, whereby the surroundings of the semiconductor chip 6 are encapsulated with the resin while bottom faces of the die pad 3 and the inner leads 5 are exposed. Next, as shown in FIG. 11E, a resin-encapsulated semiconductor device 13 is taken out of the molding die.
However, the conventional resin-encapsulated semiconductor device as described above has an increased overall thickness since the thin metal wires are used for connecting the electrodes of the semiconductor chip with the inner leads, and hence, there are limits to the thinning of the device. Further, in a situation in which high-speed signals or high-frequency signals operate, loss of signals in the thin metal wires becomes a problem, which makes it impossible to allow the semiconductor chip to function fully.
Further, since the external terminals are exposed only on the bottom face of the resin-encapsulated semiconductor device, when a plurality of resin-encapsulated semiconductor devices are stacked, electric connection between the devices cannot be achieved through external terminals thereof. Therefore, it is difficult to implement the three-dimensional packaging.